The Advantages of Linear Memory
This issue is dealt with in two levels: the difference between
constant data in ROM vs. variable data in RAM and as next
(complicating) level the existence of more than one RAM space.
1) Ansi-C provides in distinguishing between ROM constant data and
variables. The keyword const may be used to identify
unmodifyable variables. To be more precise: The compiler primarily
treats constant data as unmodifyable. Hence, compile errors are
produced when a statement is found which assigns a value to a const
variable. In the embedded world, the const keyword also takes
care of physically allocating the variable(s) in ROM.
Processors with a harvard architecture will provide distinguished
instructions for memory reads from ROM (code memory) and reads from
RAM. This is due to the separate address space. The problem arises
when functions are created which use pointers as arguments. Which
address space shall the pointer point to? A classic example of a
function using a pointer as argument is the printf() function.
Argument pointers may e.g. refer to text strings in code memory
(fixed output strings) and may also refer to strings or data in RAM
(process dependent data).
This fact results in compilers which take these circumstances into
account. They introduce a sort of "generic" pointers and
address space specific pointers. Printf() and many other functions
require "generic" pointers as argument data. At the time of
retrieving the data from the memory location, not a simple
read/transfer instruction is used (as would be the case with classic von
Neumann architectures), but a sequence of instructions.
Let us give an example of the enormous overhead in this case. We
consider mnemonics mov for moving data from RAM and movc
for moving data from code memory. test 15,ptr_reg ; MSB of pointer denotes type of memory
jrnz romdat ; jump relative to ROM read sequence
mov a,(ptr_reg) ; here indirect access from RAM to acc.
jr end
romdat: movc a,(ptr_reg) ; here indirect access from ROM to acc.
end:
This is a simplified sequence applied with a PIC processor
which has max. 32KB ROM (HiTech PICC compiler). Actually, the
sequence is more complex for ROM retrievals, because the PIC provides
special "table" pointers.
Generally, one could say that the negative impact on execution speed
tends to increase with the size of the application. This is true,
because bigger applications will have more usage of
"generic" pointers. Especially, output to graphic LCD
displays is relatively slow on Harvard based processors when generic
functions are used. The processing of character fonts may also be
ineffective when they reside only in ROM and hence can be processed
using address space specific pointers: This can be caused by complex
retrieving of ROM data in such cases.
2) The second level of address space segmentation is represented by
the existence of several RAM address spaces. Classic examples:
• 8051 having internal data memory, internal data memory
addressable indirectly only, page addressable memory and external
memory (16 bits), and code data memory.
• PIC having several banks of RAM data.
These spaces necessarily introduce special (non-ANSI) C-keywords:
data, idata, pdata, xdata, code (Keil-C 8051) resp. bank1,
bank2 etc. (PIC). Superfluous to say that portability and usability
of programs is strongly restricted through these additions. When this
limitation is a true obstacle with respect to moving toward better
processors, this would be a tragical reason.
The handling of these spaces also makes programming less transparent
and more error-prone. Less overview is also a problem. And when
resources become tight, one must often reassign variables (and
arrays) to other banks - in one word: weird. Moreover: handling of
"generic" pointers is much more resource consuming. The
above example listing should be replaced by a true assembler sequence
of a correpsonding C-"case" statement.
CONCLUSION: with medium to big projects hands off from harvard
based processors. Almost all 8-bit microcontrollers have a harvard
architecture. The majority of 16-bit microcontrollers have a harvard
architecture. 32-bit microcontrollers are OK, but not even low cost. |
